Home AR/VR Samsung and Facebook 2021 IEEE IEDM Talks chart future memory developments and their use in AR/VR applications

Samsung and Facebook 2021 IEEE IEDM Talks chart future memory developments and their use in AR/VR applications

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Samsung and Facebook 2021 IEEE IEDM Talks chart future memory developments and their use in AR/VR applications

Source: news.google.com

I attended the IEEE IEDM 2021 as well as the associated MRAM Forum in San Francisco. This was a hybrid event with only about 40% of the speakers present (notably, many speakers from Asia did not attend due to COVID and gave their presentations as recordings). Physical attendance at the conference was also lower than in previous years. This blog will explore some of the exciting developments and opportunities related to storage and memory presented in plenary talks at the IEDM conference.

Kinam Kim of Samsung Electronics provided an overview of the product development expectations for semiconductors, including DRAM and NAND flash. The figure below shows his projections for DRAM development, including changes in cell transistor structure, cell capacitance, and finally 3D DRAM stacking.

Samsung Electronics has recently introduced several new DRAM architectures to address increased memory demands to support machine learning workflows, including a) HBM-PIM (Process-in-Memory Based High-Bandwidth Memory), b) AX-DIMM (accelerated DIMM), and c) DRAM based on CXL (compute express link). HBM-PIM can increase system performance gains by up to 2.5 times, while reducing power consumption by 70%.

AX-DIMM can increase the power efficiency of AI accelerator systems by minimizing data traffic between CPU and DRAM. Finally, CXL-DRAM can substantially reduce system latency and speed up data center HPC workload processing by providing memory capacity in the Terabit (Tb) range.

The figure below shows Samsung’s projections for NAND flash memory.

Kim said that the current NAND flash bit density is about 10 Gb/mm2, and the number of stacked layers increases to 170 (Fig. 8). Samsung Electronics hopes that cost-effective manufacturing of V-NAND with more than 1,000 stack layers can be achieved through next-generation process innovations and novel materials. For the next generation of V-NAND, the HARC etching process (high aspect ratio contact) and cell current in the VNAND architecture are critical. Stack height will be addressed with multi-stacking and new processes and materials are needed to improve NAND flash memory signals with smaller stacked cells.

The figure below shows Samsung’s projections for advances in multibit cells, new materials and architectures, and better cell control.

Innovations in control circuitry, which will minimize Vt spread, and new materials for charge trap layers are key innovations. To meet I/O bandwidth requirements, which are expected to double every three years, further efforts are needed to address thermal effects. A wafer bonding process, for example, that decouples the process thermal budget for memory cells and peripheral transistors is one way to achieve this.

Michael Abrash from Facebook Reality labs Research gave a plenary talk on “Creating the future: augmented reality, the next human-machine interface”. He explored developments in virtual reality (VR) and augmented reality (AR), collectively called XR, that are in use today and developments that could enable future more immersive experiences and replace devices like smartphones with wearable technologies, like AR glasses. .

Making such devices possible will require new sensor technology, software (including ways to map and understand that world that incorporate personal contextual information, including historical interactions with this mapped representational world), as well as new ways to package electronics with advanced data processing capabilities. low power processing.

These miniaturized and low-power packages will require innovations in hardware and software design, heterogeneous package integration, and miniaturization, as shown in the figure below. Note in particular the mention of memory-centric computing under HW-SW Co-Design and eNVM in the area of ​​miniaturization for comfortable and useful AR/VR devices.

Abrash mentioned the possible use of spintronics, 2D materials, carbon nanotubes (CNRTs), functional interconnections, flexible materials, and metamaterials) to enable higher system performance, lower unit power density, and smaller physical volume to enable these future portable devices.

He also mentioned the need to develop new domain-oriented architectures and accelerations to support machine learning (ML), but also for particular applications such as avatar tracking and reconstruction, audio, eye tracking, and electromyography with wearable sensors on users’ arms. . Algorithmic optimization for model compression, low-precision computing, and platform-aware design optimization will be needed.

Current AR/VR computing systems consume the most power for data transfers and memory access. On-sensor computing and memory-centric computing approaches, such as in-memory computing, will be needed to address these bottlenecks. Also, tighter physical coupling of logic to memories, logic to sensors, and displays can help reduce data movement. He also mentioned the importance of using non-volatile embedded memories such as spin transformer magnetic random access memories (STT-MRAM) to achieve area and power optimization, as these memories have higher density than MRAM. SRAMs and are non-volatile, allowing for more lower power states.

He discussed advancements in image sensors including the use of a hybrid memory hierarchy (including SRAM and eNVM, like MRAM) in the ML compute architecture on the sensor to enable higher density and lower power. 3DIC technologies, such as three-layer stacking, across silicon vias (TSV), and wafer-level hybrid bonding, will enable this heterogeneous monolithic integration. The figure below shows a multi-camera AR/VR distributed multi-camera computing system with various features, including the use of hybrid memory systems. The figure also indicates the power and communication requirements for the various computing/communication paths.

At the 2021 IEEE IEDM, Samsung discussed expected developments in DRAM and NAND technology through 2030 to enable advanced electronics. Facebook discussed requirements including in-memory computing and emerging memories like MRAM to enable future comfortable wearable AR/VR devices that will enable new ways to work and interact with others and the world around us.

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